NVIDIA Introduces NVLink Fusion and NVHBM for Custom AI Accelerators

Hyperscalers and AI-native companies are developing custom AI accelerators, known as XPUs, to handle increasingly large models and complex reasoning workloads. [1]

Deploying these accelerators at scale requires high-bandwidth memory, efficient power delivery, and a rack-scale architecture. [1] NVIDIA NVLink Fusion serves as connective technology and IP that enables organizations to integrate custom XPUs and CPUs into the NVIDIA AI infrastructure platform. [1] Customers can utilize the NVIDIA MGX rack-scale architecture to decrease deployment complexity, improve performance, and accelerate time to market for semi-custom AI factories. [1]

At the package level, NVIDIA complements its architecture with NVHBM, a custom high-bandwidth memory base-die technology developed with leading memory vendors. [1] This technology is designed to enable increased memory bandwidth, lower power consumption, and better area savings. [1] These improvements allow custom XPUs to support larger models, read KV cache data faster, and enhance training and large-scale inference tasks. [1]

NVIDIA is extending its ecosystem's reach by making it easier for hyperscalers to integrate their own custom silicon rather than relying solely on NVIDIA GPUs. By providing NVLink Fusion and NVHBM, NVIDIA anchors custom XPU developers to its MGX rack-scale architecture, ensuring its infrastructure remains the backbone of semi-custom AI factories. This directly addresses the bottleneck of qualifying leading memory technology and package integration for custom accelerator programs mentioned by the company. What the sources don't address: Whether hyperscalers using NVLink Fusion will face licensing constraints or specific pricing models for integrating their custom XPUs into NVIDIA's proprietary infrastructure stack.